Wednesday, 22 November 2017

CSE211 : Computer Organization and Architecture Question Paper for Exam


Question 1. a)Draw the adder- subtractor circuit for input mode M and data inputs A0,A1,A2,A3 & B0,B1,B2,B3. 

b) How can a JK flip flop be converted to T Flip Flop?

c) Design a four bit combinational circuit incrementer and decrementer using full adders(Within One Circuit ).

Question 2 .a) The 8-bit registers AR and CR have the following Values:
AR=11110010
CR=10111001
Determine the 8 bit values in each register after execution of the following sequence of microoperations:
i) AR<-AR+1
ii) AR<-AR-CR
iii)CR<-shr CR 

b) Design a 8 * 1 Multiplexer Using AND gate.

Question 3. a)How are data, address and control buses involved in data transfer to and from memory? Consider a computer system RAM of 1Kb*16 . Calculate the size of data bus and address bus required for the same. 
b)Explain Hardware implementation for Left shift and Right shift using single circuit. 


Question 4. a)What do you mean by Selective complement, Give an example. 

b) Construct a 8 to 1 line multiplexer with 4 to 1 and 2 to 1 line multiplexers.

Question 5. a) Perform arithmetic operations (+15)+(-31) using Signed magnitude ,1s Complement and 2s Complement.

b) Design a 3 to 8 decoder using NAND gates. 

Question 6. Design a common Bus for eight register and Size of each register is 12 bit. Mention details of multiplexers and their inputs. 

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