**Question 1 : **

a)Enable bit plays an important role in decoder expansions. How is this justified in designing?

(a) 3X8 line decoder using two 2X4 line decoders

(b) 5X32 line decoder using four 3X8 and one 2X4 line decoders

b) How we Represent -16 using Fixed Point Signed magnitude ,1s Complement and 2s Complement .

[Marks 5]

**Question 2 : **

a) Discuss the basic logic behind counters i.e. how will you obtain 1000(8) from 0111(7)? How will you implement the same? How many flip flops will be complemented in a 10 bit binary counter to reach the next count after 1001100111 ?

b) Perform arithmetic operations (+13)+(-45) using 2s Complement .

[Marks 5]

**Question 3 : ** a)What will happen if buffer gate in the clock input of the register is removed? What is the role of clear and load signals in designing register with parallel load?

b) Design of 3 bit counter Using J-K flip flop.

[Marks 5]

**Question 4 : **a) The content of a four bit register is initially 1101. The register is shifted six times to the right with the serial input being 101101. What is the content of the register after each shift?

b) Draw the block diagram to implement following register transfer statement

yT2+ XT1: R2?R1, R1?R2 [Marks 5]

**Question 5 :** a)Register A holds the 8 bit binary 11011001. Determine the B operand and the logic micro operation to be performed in order to change the value in A to

(a) 01101101

(b) 11111101.

b) A digital computer has a common bus system for 16 registers of 32 bit each. The bus is constructed with multiplexers.

1. How many selection inputs are there in each multiplexer?

2. What sizes of multiplexers are needed?

3. How many multiplexers are there in the bus?

[Marks 5]

**Question 6 : **Draw a Bidirectional 8 bit Shift Register with Truth Table. [Marks 5]