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Tuesday, 21 November 2017

CSE261 : Computer Organization and Architecture Assignment Question paper-2 / End Term Question Paper


PART-A

Question 1. The adder- subtractor circuit has the following values for input mode M and data inputs A & B. 

In each case determine the values of the outputs: S3, S2, S1, S0 and C4

M A B
0 0111 0110
0 1000 1001
1 1100 1000
1 0101 1010
1 0000 0001

Question 2. Design a four bit combinational circuit incrementer and decrementer using full adders.

Question 3. Register A holds the 8 bit binary 11011001. Determine the B operand and the logic micro 

operation to be performed in order to change the value in A to (a) 01101101 (b) 11111101

Question 4.
Starting from initial value of R=11011101, determine the sequence of binary values in R after a 

logic shift left followed by circular shift right, followed by a logical shift right and a circular 

shift

Question 5.
 Fetching and decoding of any instruction takes three clock cycles. How?

PART-B

Question 6.
Draw timing diagram for D3T4: SC ? 0

Question 7.
How is I bit useful in determining the type of instruction

Question 8.
Why is micro programmed control better than hardwired? Identify some situations when hardwired 

is preferred.

Question 9.
How are data, address and control buses involved in data transfer to and from memory? Consider 

a computer system with 16 registers of 32 bit each and RAM of 1GB. Calculate the size of data bus 

and address bus required for the same.

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